VLSI Plus Ltd.

Member since 2004

VLSI Plus is a boutique VLSI engineering house, and an IP core provider. IP core products include state-of-the-art serial video interface, according to the latest MIPI® and SMIA specifications. ASIC as well as FPGA versions are available, which passed MIPI IOL tests.  VLSI Plus MIPI® SI2 compliant Serial Video Receiver (SVR), embedded in a customer’s system, is used by major CMOS image sensor manufacturers for the production floor testing of their image sensors.

Presently VLSI Plus, in collaboration with its partners, develops IP products which will comply with MIPI®’s emerging next generation of interface specifications. These include CSI3 – the new camera serial interface; UNIPRO 1.4 and 1.5, M-PHY, and others.

VLSI Plus was founded in 2003 by Yoav Lavi, a veteran VLSI designer and design manager with numerous designs, including some 20 original patents in all areas of VLSI.  

Learn more about VLSI Plus Ltd.

VLSI Plus Ltd. Product Information

 

 

Product Name

 Functions

 MIPI® specifications

SVRPlus-CSI2-I

 High Performance Serial Video Receiver, 1-8 data lanes

CSI2 + ext. DPHY

SVRPlus-CSI2-F

FPGA version of SVRPlus-CSI2-I

CSI2 + ext. DPHY

SVR-CS4

Serial Video receiver, 1-4 data lanes

CSI2, DPHY

SVR-CS4-F

FPGA version of SVR-CS4

CSI2 + DPHY

SVT-CS4-AP1

Serial Video Transmitter, 1-4 data lanes

CSI2 + DPHY

SVT-CS4AP1-F

FPGA version of SVT-CS4AP1

CSI2 + DPHY

         SVT-CS4-AP2              Serial Video Transmitter for mutpile concurrent           CSI2 + DPHY

                                                video streams, 1-4 data lanes
                                                

  

Learn More about VLSI Plus Ltd. Products

VLSI Plus Ltd. Product Press Releases

 

VLSI Plus offers Multiple Video Source MIPI® CSI2 Transmitter IP core

Barcelona, Spain, February 25, 2013: VLSI Plus, a leading provider of MIPI® CSI2 complaint IP cores, today announced at the MWC conference the availability of the SVT-CS4-AP2 – a MIPI® CSI2 compliant serial video transmitter, supporting multiple concurrent video sources, and employing from 1 to 4 DPHY lanes at up to 1.5Gbps per lane.

This product, complementing the veteran SVT-CS4-AP1, which supports a single video source, is initially offered in ASIC version, to be followed by an FPGA version in Q2 2013.

VLSI Plus (www.vlsiplus.com) is a boutique IP house, specializing in digital video and, in particular, in IP cores complying with MIPI® CSI2 and CSI3 Camera Serial Interface standard. VLSI Plus is the first CSI2 IP core vendor to get MIPI® IOL certificate.

Yoav Lavi, founder and CEO of VLSI Plus said: “With this feature, the customer can make full use of the CSI2 flexibility. For example, the IP may concurrently transmit a high resolution RAW12 format, where the first and last video lines carry blanking data and have a different data type, segments of JPEG thumbnail and low-resolution high frame-rate view-finder image. The various video sources may have different data types, video height and width, virtual channel number and pixel clock rates.”

Welcome New Members

MIPI Alliance extends a warm welcome to the companies which have recently joined the organization. See new companies.