Debug Working Group*

* Formerly known as Test & Debug Working Group

Charter

  • Enable best system debug support in all stages of the mobile equipment development focusing on the following:
    • Low cost solutions
    • Interoperability by defining standards.
    • The targeted interfaces are hardware and software interfaces interacting with or supporting system debug.
  • The standardization shall supply benefits for manufacturers as well as for users. The WG will:
    • Identify the gaps in current non-MIPI and MIPI standards
    • Develop recommendations and propose solutions, which may end up in guidelines for standards as well as in interface and protocol standardizations.
  • To reach the goal the WG will cooperate with other MIPI WG’s, and other industry bodies if appropriate.

Scope

The scope of Debug will be to unify/define:

  • Mating connection and pin assignment for debug and test tooling
  • Electrical/timing characteristics of these interfaces
  • Common base protocols/carrier protocol
  • A system-wide debug approach

Debug has many different efforts underway

  • Standards starting from board level connectors up through software protocols
  • Narrow I/F for Debug and Test (NIDnT)
  • System Trace Interface
  • Parallel Trace Interface
  • Gigabit Trace Interface
  • Debug Connectors
  • Trace Wrapper Protocol
  • System Trace Protocol
  • Open System Trace

The Debug Working group is currently focusing on defining the protocol stack that will enable system debug over the MIPI UniPro communications protocol and the MIPI M-PHY physical interface.

History

  • Spun off minimum-pin debug effort to IEEE 1149.7 (2006)
  • System Trace Protocol Specification (2007)
    • Generic trace protocol optimized for efficient transport of HW and SW trace messages
  • Parallel Trace Interface Specification (2007)
    • Timing and electrical specification for parallel trace interface
  • Debug Connectors Recommendation (2008)
    • Connector types and pin mappings
  • Open System Trace Base Protocol Specification (2009)
    • Low level protocol for SW message trace
  • System Trace Protocol Specification 2.0 (2010)
    • Expands on 1.0 with increased channel/master space, better synchronization, and enhanced timestamps
  • Trace Wrapper Protocol Specification (2010)
    • Defines how to merge data from multiple trace sourced into a single stream  
  • Parallel Trace Interface Specification 2.0 (2010 – undergoing final tech edits)
    • Adds multi-drop trace

Roadmap

  • Debug Architecture Overview (2010)
    • Overview document that pulls together all the efforts in MIPI T&D
  • Narrow Interface for Debug and Trace Specification (2010/11)
    • Reuse of functional interfaces (e.g. MMC) for debug
  • Gigabit Trace Data Protocol Specification (2010/11)
    • Network independent protocol for transporting trace data over high speed functional interfaces like UniPro and USB 3.0
  • Gigabit Trace Network Adaptor for UniPro Specification (2011)
    • UniPro specific adaptor for Gigabit Trace Data Protocol
  • Gigabit Trace Network Adaptor for USB 3.0 Specification (under consideration)
    • USB 3.0 specific adaptor for for Gigabit Trace Data Protocol
  • Open System Trace Framework (2011/12)
    • A family of specification for a robust infrastructure to manage SW trace messaging between the debug target and host systems


Working Group Chair

Gary Cooper,  Texas Instruments

 

Working Group Vice-Chair

Jean-Francis Duret  , ST 

 

Contributing Companies:

ARM, Intel, Lauterbach, Nokia, Qualcomm, ST-Ericsson, ST-Microelectronics, Texas Instruments

AttachmentSize
MIPI_TD_connectors_recommendation_v01-00-00.pdf499.59 KB
MIPI_TDWG_whitepaper_NIDnT_V1_0.pdf443.58 KB
MIPI_TDWG_whitepaper_V3_2.pdf584.66 KB
mipi-wp-cjtag-v1_42.pdf157.25 KB