Next week, MIPI Debug Working Group Chair Enrico Carrieri and working group member Matthew Schnoor will take an in-depth look at the recently released MIPI Debug for I3CSM v1.0, which allows system designers to dynamically debug and test application processors, power management integrated circuits, modems and other power-managed components.
A Deep-Dive Into the New Specification
The webinar, "MIPI Debug for I3C: The Next Generation Debug Interface," on 21 October at 08:00 - 09:00 (PDT), is aimed at debug experts and will cover how MIPI Debug for I3C leverages the low-bandwidth MIPI I3C®, as well as details on its key features, including interface topologies, Common Command Codes, in-band interrupts and network adaptor.
Enrico and Matthew will also discuss how MIPI Debug for I3C addresses the challenges of current debug solutions, the goals set by the working group when creating the specification and how it meets the requirements of new technologies such as 5G and IoT.
About the Presenters
Enrico recently received the 2019 Working Group Leadership Award in part for his coordination with the I3C Working Group to ensure the quality of the debug specification. Matthew, a debug architect and member of the Debug Working Group, has enabled MIPI I3C to support MIPI Debug for I3C, and currently works across and within several MIPI working groups to help develop specifications in support of that goal.
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Christina Slape, MIPI Senior Communications Manager
