Sunday, March 3, 2019 to Wednesday, March 6, 2019

Overview:
TestConX is the world’s premier event for test engineering and operations dedicated to providing a forum for the latest information on a broad range of topics related to electronic test. Focused on "connecting electronic test professional to solutions", the technical program provides practical content that is immediately useful. TestConX is the place where industry colleagues from around the world come to learn from presentations made by people like you.

Speakers & Session Titles:

MIPI I3C: A New Bare-Metal Interface for Debug and Test
Enrico Carrieri, Intel Corporation

MIPI Tiny SneakPeek: An Optimized Debug Protocol for efficient Platform Debug
Rolf Kühnis, Intel Corporation

When:

Monday, 4 March 2019, 10:30 a.m. - 12:30 p.m.

Session Overview:

Post-silicon validation takes place between initial silicon power on (PO) and product launch. The main goal of validation is to verify product functionality against the Engineering Design Specification. The session starts with an introduction of the benefits of a new industry specification that is being developed by the members of the MIPI Alliance’s Debug work group around using the MIPI I3C (an improved I2C) interface for debug and test that can communicate between the different components in systems/platforms. The second presentation will show the evolution of the debug solutions in mobile systems addressed by MIPI and the USB organization. We will get an introduction of the different debug standards used for closed-chassis debug and to see how they create a complete solution. In the third presentation, timing issues on I3C interface and multiple strategies for coping with them in instrumentation and platform design will be addressed. In the final presentation, an innovative and scalable architecture developed for high performance mid-bus probing for PCIe 4.0, 5.0 and beyond will be covered. Read more about the session.

More information about the Workshop

Event Location: 
Mesa, Arizona, USA