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MIPI White Paper

 

Architecture Overview for Debug v1.4

 

An introduction to the generic MIPI architecture for debug and test systems, and overview of the "MIPI Debug Over" (MDO) family of debug and trace specifications

 

Recent technological developments with SoC technologies have greatly increased the complexity of system debug and optimization. Signals and interfaces that used to be visible at test points on a PCB are now deeply embedded inside a SoC, and methods of probing physical buses and signals with dedicated debug and test equipment are now virtually impossible.

New technologies are being deployed that provide the visibility required in these deeply embedded designs; but to maximize the utility and efficiency of debug, converging on common interfaces and protocols used by these new technologies is essential.

To meet this need, the MIPI Debug Working Group is developing an ever wider portfolio of debug and trace standards that are based on a generic architecture and address the particular needs of debug, including:

  • Minimizing the pin cost and increasing the performance of the basic debug interface
  • Increasing the bandwidth, capability and reliability of the high-performance interfaces used to export high bandwidth, unidirectional debug data to the debug tools
  • Deploying debug connectors that are physically robust and have the performance required for the high bandwidth demands of modern debug technologies
  • Developing generic trace protocols that allow many different on chip trace sources to share a single trace data flow to the debug tools
  • Maximizing debug visibility in fielded systems by reusing some of the functional interfaces/connectors for debug
  • Utilizing the new high-bandwidth functional interfaces being deployed on various systems as a transport for debug
  • Providing a single, defined method to manage common, secure communication sessions

Read the White Paper

This white paper details the generic architectural model for debug and provides an overview of MIPI’s comprehensive portfolio of debug and trace specifications to address the latest industry requirements in this important area.

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