A physical layer for high-performance, cost-optimized cameras and displays

Quick Facts

Primary Uses
  • Predominant PHY for smartphone, IoT and automotive camera and display applications
  • Supports MIPI CSI-2 and MIPI DSI-2 in low-power, high-speed applications for interconnect lengths up to 4 meters
Fundamental features
  • High performance
  • Low power
  • Low EMI
Use Cases

Smartphone cameras and displays

Smart watch displays

Drones

Surveillance cameras

Robots

Large tablets

In-sight (glass) products

In-car infotainment and dashboard displays

Automotive camera and radar sensors

Industries

Icon of a Smart PhoneIcon of a TabletIcon of a laptopIcon of an AutomobileIcon of a cloud with the letters IoT inside.Icon of a cameraIcon of a Smartwatch

Overview

MIPI D-PHY℠ connects megapixel cameras and high-resolution displays to an application processor. It is a clock-forwarded synchronous link that provides high noise immunity and high jitter tolerance. MIPI D-PHY also offers low latency transitions between high-speed and low power modes.

MIPI D-PHY is a popular PHY for cameras and displays in smartphones because it is a flexible, high-speed, low-power and low-cost solution. It is also applied for many other use cases, such as drones, very large tablets, surveillance cameras and industrial robots. Further, D-PHY is also used heavily in automotive applications including camera sensing systems, collision avoidance radars, in-car infotainment and dashboard displays with the support of proprietary bridging solutions.

Operation and available data rates for a link are asymmetrical due to a master-slave relationship of the link transceivers. The asymmetrical design significantly reduces the complexity of the link and is well-suited for display and camera use cases with one major data transmission direction, for example. Bi-directional and half-duplex operation are optional.

New Features in MIPI D-PHY v2.5

MIPI D-PHY v2.5 adds a fast BTA as well as an Alternate Low Power (ALP) feature, which enables a link operation using only D-PHY’s high-speed signaling levels. These features enable applications of not only mobile devices, but also IoT devices operating over several meters at high-speed. Also, these features enable an in-band control mechanism in conjunction with MIPI’s CSI-2 v3.0 Unified Serial Link (USL). Maximum date rates remain at up to 4.5 Gbps over the standard channel and up to 6 Gbps over the short channel.

MIPI D-PHY is developed by the MIPI PHY Working Group.

The specification is available only to MIPI Alliance members. For information about joining MIPI alliance, see Join MIPI.