- Available to non-members of MIPI Alliance and the open source community
- Based on the MIPI I3CSM bus interface for connecting sensors to an application processor
- Defines a common set of capabilities for the host controller and the software interface
The MIPI I3C HCISM (Host Controller Interface) specification defines the building of a common software driver interface to support compliant MIPI I3C host controller (master device) hardware implementations from multiple vendors to more easily integrate value-added features for smartphones, wearables, Internet of Things (IoT), automotive and more.
MIPI I3C is a bus interface for connecting sensors to an application processor in a multi-vendor environment. It can combine multiple sensors in a device to streamline integration and improve cost efficiencies.
Smartphones and other devices have a rapidly increasing number of mechanical, motion, biometric and environmental sensors. This sensor proliferation creates significant design challenges, especially for software developers.
For example, without a common method for interfacing to MIPI I3C, every host controller must have its own system software or driver to support that piece of hardware. Every host controller implementation may also provide a different set of features and optimizations.
MIPI I3C HCI is also included in the MIPI Touch family of specifications, making it possible to use touch commands and multiple data streams to add differentiating touch features to a design. Application processor companies can apply the specification to standardize the HCI method used in their devices.
Using MIPI I3C HCI
MIPI I3C HCI defines a common set of capabilities for the host controller and the software interface, allowing for the building of class definitions based on a common set of features. The definition allows for vendor-specific extensions and optimizations.
The specification defines several optimizations based on typical usage. For example, the combo command feature allows for the efficient one-shot transfer of write and then read transfers on the bus.
Other key MIPI I3C HCI v1.0 features include:
- Support for MIPI I3C main master device operation on the I3C bus
- Two modes of operation: Direct data interface support (PIO mode), with programmable buffer depths for the transmit/response and data buffer, and DMA interface support (DMA mode) to support scatter gather transfers for data buffers
- Power-efficient operation of the host controller, which helps maximize battery life in mobile devices
- Support for I3C data rates, including I2C fast mode (up to 400Kbps), I2C fast mode+ (up to 1Mbps) and I3C SDR (up to 12.5Mbps)
- Support for extended capabilities, including vendor-specific ones, to enable more sophisticated hardware or additional functionality
MIPI Alliance also welcomes contributions to the specification. If you would like to contribute, please contact us at firstname.lastname@example.org.