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MIPI I3C®

& MIPI I3C Basic℠

Sensor
Developed by: I3C Working Group

A medium-speed, utility and control bus interface for connecting peripherals to an application processor in a range of mobile, IoT and automotive applications

Quick Facts

Overview

General Info

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Version Feature Comparison

I3C v1.0 I3C Basic v1.0 I3C v1.1.1 I3C Basic v1.1.1
Feature
Availability
MIPI members only
Available for download
MIPI members only
Available for download
12.5 MHz SDR (Controller, Target and Legacy I2C Target Compatibility
Target can operate on I2C device on I2C bus and on I3C bus using HDR modes
Target Reset
Specified 1.2V-3.3V Operation for 50pf C load
In-Band Interrupt (w/MDB)
Dynamic Address Assignment
Error Detection and Recovery
Secondary Controller
Hot-Join Mechanism
Common Command Codes (CCCs)
All CCCs
Required CCCs
All CCCs
Required CCCs
Specified 1.0V Operation for 100pf C load
Set Static Address as Dynamic Address CCC (SETAASA)
Synchronous Timing Control
Asynchronous Timing Control (Mode 0)
Asynchronous Timing Control (Mode 1-3)
HDR-DDR
HDR-TSL/TSP
HDR-BT (Multi-Lane Bulk Transport)
Grouped Addressing
Device-to-Device(s) Tunneling
Multi-Lane for Speed (Dual/Quad for SDR and HDR-DDR)
Monitoring Device Early Termination

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