MIPI TWP™

General Info

• Overview

  MIPI Trace Wrapper Protocol (MIPI TWP^SM) enables multiple source trace streams to be combined (merged) into a single trace stream. The basic principle is that the source trace streams (byte streams) can be assigned system unique IDs. A wrapping protocol is then used to encapsulate all the streams in the system and identify them with these IDs.

  This protocol also includes provisions for synchronizing the merged output stream and providing inert packets for systems that cannot disable continuous export of data. It has optional facilities for indicating to the debug and test controller (DTC) the position of a trigger event, which is typically used to control actions in the DTC (e.g., to control trace capture).

  MIPI TWP is developed by the MIPI Debug Working Group. It is available as v1.1. All MIPI debug and trace specifications, including MIPI TWP, are available for download and use by the public and the open source community. Members of the MIPI Alliance enjoy benefits including access to relevant licenses and opportunities to participate in development activities, interoperability workshops and other events.

  For information about MIPI Alliance membership, visit Join MIPI.

• Key Capabilities

  MIPI TWP is complementary to MIPI Parallel Trace Interface (PTI) and to the MIPI Gigabit Debug network adaptor specifications, such as MIPI Gigabit Debug for USB. It is intended to be used by any module or layer that merges multiple trace data streams.

  The ultimate destination of the merged streams might include:

  • Host debug tools via a dedicated trace export interface (PTI)
  • On-chip capture into a dedicated trace buffer
  • On-chip capture into general system memory
  • Host debug tools via a functional network (GbD)

  
  MIPI TWP is also complementary to MIPI STP, enabling a trace output to be shared between sources that implement it and logic that implements other trace protocols. In addition, it is compatible with the Trace Formatter Protocol specified in the Arm^® CoreSight™ Architecture Specification.

• Diagrams & Tables

  Example Use Cases for Layers T1, T2 and T3
  (click to enlarge)