MIPI Alliance has recently released new versions of its two physical layer specifications designed for high-performance, cost-optimized cameras and displays. MIPI C-PHYSM v2.0, released in September 2019, and MIPI D-PHYSM v2.5, released in October, introduce key new features that make the specifications applicable for expanded Internet of Things (IoT) use cases along with many mobile use cases.
Manufacturers and developers already leverage MIPI specifications to interface components in both complex, high-end mobile and IoT devices (which integrate multiple sensors and high-performing cameras and displays) and basic, low-end products (which may use just one or two sensors, have modest CPU requirements and require little bandwidth but must maintain a charge for hours or even months).
An increasingly prevalent and important requirement in IoT applications is for longer interconnects at very, very low power. The new versions of both MIPI PHY specifications introduce features designed to support devices operating over several meters at high speeds. The Fast Bus Turnaround (BTA) feature, for example, enables the same link used for high-speed serial communication in one direction to also carry control communication in the opposite direction. Both upload and download latency decrease as a result, and interconnect costs are lessened.
Similarly, the new Alternate Low Power (ALP) feature introduced in MIPI C-PHY v1.2 and MIPI D-PHY v2.5 enables a link operation using only high-speed signaling levels over channels up to four meters. The ALP feature replaces legacy Low Power signaling with pure, low-voltage differential signaling. ALP aligns with trends in the semiconductor industry toward decreased dimensions and lower voltage levels.
The Fast BTA and ALP features work together to allow implementation of the Unified Serial Link (USL) feature in MIPI CSI-2SM (Camera Serial Interface) v3.0, released in September 2019, and enable an in-band control mechanism. By unifying what have been two discrete elements—the sideband command line interface of the Camera Control Interface and high-speed pixel data communication—USL efficiently converges both processes within a single high-speed link. The result for IoT developers is the cost-effective elimination of an extra pair of wires and realization of high-speed links which can be operated over a longer distance. Lengthening that distance expands flexibility and freedom of choice for embedded designers. For example, the interconnect distance from a drone’s processor to its HD vision unit could now be extended up to four meters.
The synchronicity of the Fast BTA, ALP and USL features across the MIPI C-PHY, D-PHY and CSI-2 interfaces illustrates the complete system advantage available uniquely through MIPI. While its specifications are offered individually, enabling companies to use those that suit their own particular needs, MIPI maintains a comprehensive portfolio of specifications that enable interconnection across the full range of needed system interfaces, including specifications for physical layers, protocol layers, power, control and data management, system debugging and software integration. All PHY specifications are characterized by a commitment to low power, high bandwidth and low electromagnetic interference (EMI).
MIPI C-PHY v2.0 also adds support for symbol rates up to 6 Gsps over a standard channel and up to 8 Gsps over a short channel, as well as support for RX equalization, which enables increased symbol rates for higher-resolution displays and high-performance cameras, for example. MIPI D-PHY v2.5’s maximum data rates remain at up to 4.5 Gbps over the standard channel and up to 6 Gbps over the short channel.
The MIPI PHY Working Group continues to innovate MIPI C-PHY and D-PHY to adapt for emerging market dynamics and application needs; indeed, MIPI D-PHY v3.0 is scheduled for release in 2020 and is planned to boost the specification’s data rates for multiple channels. Both interfaces are available to MIPI members only. Learn more about becoming a MIPI member and contributing to future specification development efforts.
Henrik Icking is chair of the MIPI PHY Working Group.
Raj Kumar Nagpal is vice chair of the MIPI PHY Working Group, lead of the MIPI D-PHY Subgroup, and lead of the MIPI A-PHY Subgroup.
George Wiley is lead of the MIPI C-PHY Subgroup.
[Authors shown in photo from left: Icking, Nagpal, and Wiley.]